• How To Measure Current In Pspice

Repeat this but now for Layout - Labels- Device Click inside the assembly outline and write “devtype”. Then finally: File- Create Symbol - save it as CONN2 Return to ORCAD Capture CIS and change in the schematics click on the symbols that have 2 connectors and denote its footprint as CONN2. There are three of them.

Model KindVoltage Source Model Sub-KindSinusoidal SPICE PrefixV SPICE Netlist Template Format@DESIGNATOR%1%2?' DC MAGNITUDE' DC @'DC MAGNITUDE' SIN(?OFFSET/&OFFSET//0/?AMPLITUDE/&LITUDE//1/?FREQUENCY/&FREQUENCY//1K/?DELAY/&DELAY//0/?' DAMPING FACTOR'/&'DAMPING FACTOR'//0/ &PHASE) #'AC MAGNITUDE' AC @'AC MAGNITUDE' @'AC PHASE' Parameters (definable at component level)The following component-level parameters are definable for this model type and are listed on the Parameters tab of the Sim Model dialog. To access this dialog, simply double-click on the entry for the simulation model link in the Models region of the Component Properties dialog.DC MagnitudeDC offset used in an Operating Point Analysis. (Default = 0).AC Magnitudethe magnitude of the source when used in an AC Small Signal Analysis. (Default = 1).AC Phasethe phase of the source when used in an AC Small Signal Analysis. (Default = 0).OffsetDC offset voltage of the signal generator (in Volts).

(Default = 0).Amplitudepeak amplitude of the sinusoid (in Volts). (Default = 1).Frequencyfrequency of the sinusoidal output voltage (in Hz).

(Default = 1K).Delaydelay time until the source voltage commences (in seconds). (Default = 0).Damping Factorthe rate at which the sinusoid decreases/increases in amplitude (in 1/seconds). A positive value results in an exponentially decreasing amplitude; a negative value gives an increasing amplitude. A zero (0) value gives a constant amplitude sine wave. (Default = 0).Phasephase shift of the sinusoid at time zero (in Degrees). (Default = 0).Notes.

The image above shows an example waveform produced by a sinusoidal voltage source (connected to a 1Ohm load). The Delay has been set to 500.0u and the Damping Factor set to 250 - to illustrate a decreasing sinusoid.

The option to base a new project on an existing project takes the place of a File - Save As command. It pulls in all aspects of the existing design including simulation profiles, included model libraries, and included stimulus files. In essence, this allows you to quickly make a copy of an existing project. This is useful if you have a design at a working stage, but would like to try some “what-if?” experiments without losing the current working design if the changes don’t pan out.The PSpice A/D Project. A part in EDA terms is more than just the graphics that are placed on the schematic page. A part is actually a collection of information of which the graphic element is only another piece. A part can have many properties such as the link to the analog or digital simulation model, the footprint used in Layout, a reference designator, as well as information pulled into the design from the CIS database or from the Activeparts.com website.

The information associated with a part can be configured by the engineer to suit the specific needs of the design.Placing a Part. Despite the fact that the capacitors and resistors in PSpice A/D are not polarized, it is still important to position the parts in the correct orientation. Positive current in PSpice A/D is defined as flowing from pin 1 to pin 2.

If you rotate a capacitor or resistor once (now in a vertical position) and then look at the current on the top pin, it may appear to be the negative of what you expect. The simulation is not incorrect, you are simply looking at the results using the wrong frame of reference.

How To Measure Current In Pspice

You can correct the problem by looking at the current on the opposite pin or by flipping the component and resimulating.Connecting Parts Electrically. Unlike electrical wires in PSpice A/D, buses carry no electrical information. System connectivity is passed through buses by the name assigned to the bus. In the above graphic for example, the bus is named Q0-3.

This indicates that the bus name is Q and it is four bits wide. The name could also have been given as Q0:3. Either naming convention is valid. Note that the bits are enclosed in square brackets, not parentheses. The net aliases given to the wires associated with the bus will be; Q0, Q1, Q2, and Q3. It is not necessary to use square brackets when naming individual wires.Placing Symbols. That is, each device must be assigned a unique reference designator.

All parts are assigned a reference designator as they are placed. You can define the application preferences to either automatically assign a unique value to each reference designator or to assign a value with a question mark.

If the value assigned to reference designators include question marks, you must annotate your design to assign a unique values. You must annotate your design whether you are going to take your design into Layout or PSpice A/D.